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Known Issues

For the first shot we see no wild wiring on the board and all functions are working. However, the first prototype always has some issues left to solve.

SRAM power down current

Sleep current

The SRAM ICs available in SOJ housing typically show a lot of sleep current consumption. The best device that we could find is from ISSI and still consumes several hundred microampere.

SRAM Deselect

The original schematic did arrange the external SRAM right behind the internal SRAM to provide a continuous memory range. This approach did show the disadvantage, that the SRAM did always get selected when an internal access occurred. The result was a high sleep current in the range of several milliamp. The current prototypes are reworked to select the external SRAM with in the address range from 32k to 64k.

GPS / SD power from USB

The current design can not provide power from USB to the GPS module. This is considered a minor issue since a USB connection is not likely to be available when using the system outdoor and the GPS can still be powered from the internal battery.

The current design approach is more effective since the GPS voltage is derived directly from the battery voltage using an ultra low drop LDO.

GPS & SD power from same regulator

The current design is using the same regulator to provide power to the GPS and the SD Card. This is an issue since there is no power down command for the GPS module as expected initially. We are working on a rework to generate the SD card voltage out of the CPU voltage. This change is required to control the GPS power supply without killing the SD Card.